Present: Process Manufacturing Engineer in ASMPT to sustain efficient operation of SIPLACE placement machines. Proven ability to implement process improvements, enhance machine performance, and optimize production workflows for maximum efficiency and cost-effectiveness.
Previous: Former Field Process Engineer from LAM RESEARCH supporting Micron Semiconductor memory account in dielectric dry etch process recipe development and productivity.
Lead and Optimize Manufacturing Processes for Semiconductor Equipment:
Troubleshot and Enhanced Production Yield:
Developed Process Documentation and Standard Operating Procedures (SOPs):
Monitored and Managed Process Control:
Involved in TX and XS Product Transfer
Led Process Transfer for 160s Slit and 150s Pillar FOAK Tools:
Led Process Tool Installation Teams for Advanced Etch Machines (VantexB, HX+/HXE):
Collaborated with Stakeholders to Develop and Optimize 160s Slit Project Scorecards:
Worked Closely with Product Groups to Improve 4C Slit Etching Process Metrics:
Process improvement
Teamwork and collaboration
Problem-solving
Time management
Problem-solving abilities
Multitasking Abilities
Excellent communication
Decision-making
Critical thinking