Summary
Overview
Work History
Education
Skills
Certification
Accomplishments
Timeline
Generic
Shah Aifa Shah Johan

Shah Aifa Shah Johan

Lithography/Etching/AOI Technology Development Manager
Kulim

Summary

A dedicated, goal oriented and quality driven team player with innovative leadership style. 12 Years of experiences in Semiconductor Wafer Fab and IC Substrate processes mainly Lithography, Etching, AOI, Epitaxy and Glassivation. Driving Technology Development involving various semiconductor design in Semiconductor and IC Substrate industry. Lead Technology transfer (Start up) in both Semiconductor Wafer Fab and IC Substrate Industry including process engineering setup, qualification and optimization. Leading a group of engineers in solving process quality issues as well as improving yield, cost and quality through various Problem Solving Methods.

Overview

20
20
years of professional experience
4
4
Certifications
1
1
Language

Work History

Lithography/Etching Technology Development Manager

AT&S Malaysia
Kulim, 02
07.2022 - Current
  • Successfully leading group of 10 process engineers in accomplishing IC Substrate Technology Transfer and Process Qualification from China to Malaysia plant in timely manner within targeted yield.
  • Driving Process Yield Improvement Plan such as Process Residue and Copper Void defect improvement activity. Achievement: 50% Process Residue defect rate improvement through new developed process control implementation such as Rayon roller cleaning method, Pre-heater foreign material improvement activities and Dummy panel loading procedures as well as incoming panel edge criteria quality control.
  • Weekly alignment across functional department (NPI, Production, Maintenance, Quality) and Customer on Process Internal Parameter and Yield Improvement Plan to meet demand quality and quantity.
  • Leading NPI and Path Finding Technology Development and Risk Assessment involving various new Litho copper trace/space design to meet latest customer demand.
  • Build up team core competency individually and as strong team player in meeting aligned target.

Lithography and Glassivation Section Manager

ON Semiconductor (M) Sdn Bhd
05.2004 - 02.2014
  • Responsible for Engineering Operations for Lithography and Glassivation Engineering Divisions, leading team of 6 Engineers, 2 Technicians and over 50 Manufacturing Specialist in meeting production needs (output, quality and cost)
  • Championed/Core member of Engineering Process Transfer and Start Up from other fab worldwide to Seremban fab
  • Task includes tool installation, process qualification, manufacturing training up to established production run
  • (Glassivation Processes including Wet Etch, Glass Mixing, Lithography and Furnace) transfer from Phoenix Fab, Arizona, Schottky Lithography Transfer Qualification from Lion Fab, China to Seremban Fab, Malaysia)
  • Championed Engineering Process Yield, Throughput and Cost Improvement (STM Backgrind Breakage Scrap Reduction, Small Signal Contact Junction Opening Control To Mitigate Leakage, Lithography Coater and Developer Chemical Cost Saving, Lithography Mask Pellicle Supplier Qualification, Lithography Daily Rework Rate Improvement) Supported New Process, Chemical and Product Development (NPI) towards continuous improvement and innovation in technology (Ultrafast Glassivation Junction Improvement, Schottky and STM SC450 Photoresist Qualification, Flip Chip Schottky and IGBT Wafer Backside Coat and Align Setup) Championed Process Control Document and Chart Improvement (FMEA, Control Plan, Standard Operating Procedure (SOP) Documents and Process Output SPC Chart)

Education

Master of Science - Microelectronic System Design Engineering

University Malaysia Perlis (UniMAP)
Perlis

Bachelor of Science - Electric / Electronic Engineering

University Technology of Malaysia (UTM)

Skills

  • Technical knowledge in Lithography/Etching/AOI processes
  • Problem Solving Methods and Yield Improvement Activities
  • Coaching and Mentoring Engineers in developing their potential in meeting performance target
  • Analytical mindset

    Certification

    First and second party auditor in ISO/TS16949:2002

    Accomplishments

    • 50% ICS Litho Process Residue Improvement through Incoming Panel Edge Criteria Control, Rayon Cleaning Method and PreHeater Foreign Material Improvement.
    • 90% Backgrind Breakage Scrap Improvement due to Hard Resist through Lithography Coater Top Edge Bead Removal Implementation.
    • 95% Improvement in Clipper Metal (TiNiAg) Incomplete Etch Leakage Yield through Post Etch (EKC) Clean Introduction.
    • 20-60% Developer Chemical (WNRD & NBA) Cost Reduction through Chemical Dispense Window (DMAIC) Optimization.
    • 20% Glassivation Throughput Improvement through Effective Glass Crock Volume and Change Procedure Optimization.
    • 10% Epitaxy Throughput Improvement Through Chamber Heating and Etching Optimization.

    Timeline

    Lithography/Etching Technology Development Manager

    AT&S Malaysia
    07.2022 - Current

    Lithography and Glassivation Section Manager

    ON Semiconductor (M) Sdn Bhd
    05.2004 - 02.2014

    Master of Science - Microelectronic System Design Engineering

    University Malaysia Perlis (UniMAP)

    Bachelor of Science - Electric / Electronic Engineering

    University Technology of Malaysia (UTM)
    Shah Aifa Shah JohanLithography/Etching/AOI Technology Development Manager